Vijay S. Pai

Research Publications

Refereed Journal Publications

• J. Dyaberi, B. Parsons, K. Kannan, V. Pai, Y. Chen, R. Jana, D. Stern, A. Varshavsky, B. Wei, Managing Cellular Congestion Using Incentives, IEEE Communications, pp. 100-107, Volume 50, No. 11, (November, 2012).
• M. Kulkarni, V. Pai, and D. Schuff, Towards Architecture Independent Metrics for Multicore Performance Analysis, Performance Evaluation Review, pp. 10-14, Volume 38, No. 3, (December, 2010).
• D. Schuff, V. Pai, P. Willmann, S. Rixner, Parallel Programmable Ethernet Controllers: Performance and Security, IEEE Network, pp. 22-28, Volume 21, No. 4, (July, 2007).
• H. Kim, S. Rixner, V. Pai, Network Interface Data Caching, IEEE Transactions on Computers, pp. 1394-1408, Volume 54, No. 11, (November, 2005).
• D. August, S. Malik, L. Peh, V. Pai, M. Vachharajani, P. Willmann, Achieving Structural and Composable Modeling of Complex Systems, International Journal of Parallel Programming, pp. 81-101, Volume 33, No. 3, (June, 2005).
• K. Skadron, M. Martonosi, D. August, M. Hill, D. Lilja, V. Pai, Challenges in Computer Architecture Evaluation, IEEE Computer, pp. 30-36, Volume 36, No. 8, (August, 2003).
• C. Hughes, V. Pai, P. Ranganathan, S. Adve, Rsim: Simulating Shared-Memory Multiprocessors with ILP Processors, IEEE Computer, pp. 40-49, Volume 35, No. 2, (February, 2002).
• V. Pai, S. Adve, Code Transformations to Improve Memory Parallelism, Journal of Instruction-Level Parallelism, Volume 2, (May, 2000).
• S. Adve, V. Pai, P. Ranganathan, Recent Advances in Memory Consistency Models for Hardware Shared Memory Systems, Proceedings of the IEEE, pp. 445-455, Volume 87, No. 3, (March, 1999).
• V. Pai, P. Ranganathan, H. Abdel-Shafi, S. Adve, The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors, IEEE Transactions on Computers, pp. 218-226, Volume 48, No. 2, (February, 1999).

Refereed Conference Publications

• M. Musleh, V. Pai, Automatic Sharing Classification and Timely Push for Cache-Coherent Systems, Supercomputing (SC), Austin, TX, (Nov, 2015).
• A. Pan, V. Pai, Runtime-Driven Shared Last-Level Cache Management for Task-Parallel Programs, Supercomputing (SC), Austin, TX, (Nov, 2015).
• B. Parsons, V. Pai, Exploiting Process Imbalance to Improve MPI Collective Operations in Hierarchical Systems, International Conference on Supercomputing (ICS), Newport Beach, CA, (June, 2015).
• A. Ranjan, S. Ramasubramanian, R. Venkatesan, V. Pai, K. Roy, A. Raghunathan, DyReCTape: A Dynamically Reconfigurable Cache Using Domain-Wall Memory Tapes, Design Automation & Test in Europe (DATE), Grenoble, France, (March, 2015).
• M. Musleh, V. Pai, J. Walters, A. Younge, S. Crago, Briding the Virtualization Performance Gap for HPC using SR-IOV for Infiniband, IEEE International Conference on Cloud Computing (CLOUD), Anchorage, AK, (June, 2014).
• E. Villasenor, J. Dyaberi, T. Pritchett, V. Pai, M. Thottethodi, MorphStore: A Local File System for Big Data with Utility-driven Replication and Load-adaptive Access Scheduling, International Conference on Massive Storage Systems and Technology(MSST), Santa Clara, CA, (June, 2014).
• V. Kozhikottu, A. Pan, V. Pai, A. Raghunathan, Variation Aware Cache Partitioning for Multithreaded Programs, Design Automation Conference (DAC), San Francisco, CA, (June, 2014).
• B. Parsons, V. Pai, Accelerating MPI Collective Communications through Hierarchical Algorithms without Sacrificing Inter-Node Communication Flexibility, IEEE International Parallel & Distributed Processing Symposium (IPDPS), Phoenix, AZ, (May, 2014).
• A. Pan, V. Pai, Imbalanced Cache Partitioning for Balanced Data-Parallel Programs, ACM/IEEE International Symposium on Microarchitecture (MICRO), Davis, CA, (December, 2013).
• C. Liu, M. Jamal, M. Kulkarni, A. Prakash, V. Pai: Exploiting Domain Knowledge to Optimize Parallel Computational Mechanics Codes, International Conference on Supercomputing (ICS), Eugene, OR, (June, 2013).
• B. Parsons, V. Pai, A Mathematical Hard Disk Timing Model for Full System Simulation, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, (April, 2013).
• G. Upadhyaya, S. Midkiff, V. Pai, Automatic Atomic Region Identification in Shared Memory SPMD Programs, ACM International Conference on Systems, Programming, Languages and Applications: Software for Humanity (SPLASH, formerly OOPSLA), Reno, NV, (October, 2010).
• D. Schuff, M. Kulkarni, and V. Pai, Accelerating Multicore Reuse Distance Analysis with Sampling and Parallelization, International Symposium on Parallel Architectures and Compilation Techniques (PACT), Vienna, Austria, (September, 2010).
• J. Dyaberi, K. Kannan, V. Pai, Storage Optimization for a Peer-to-Peer Video-on-Demand Network, Multimedia Systems (MMSys), Scottsdale, AZ, (February, 2010).
• Q. Ali, S. Midkiff, V. Pai, Modeling Advanced Collective Communication Algorithms on Cell-based Systems, Principles and Practices of Parallel Programming (PPoPP), Bangalore, India, (January, 2010).
• G. Upadhyaya, S. Midkiff, V. Pai, Using Data Structure Knowledge for Efficient Lock Generation and Strong Atomicity, Principles and Practices of Parallel Programming (PPoPP), Bangalore, India, (January, 2010).
• Q. Ali, S. Midkiff, V. Pai, Efficient High-Performance Collective Communication for the Cell Blade, International Conference on Supercomputing (ICS), Yorktown Heights, NY, (June, 2009).
• Q. Ali, S. Midkiff, V. Pai, Advanced Collective Communication in Aspen, International Conference on Supercomputing (ICS), Kos, Greece, (June, 2008).
• D. Schuff, Y. Choe, V. Pai, Conservative vs. Optimistic Parallelization of Stateful Network Intrusion Detection, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, (April, 2008).
• Y. Choe, D. Schuff, J. Dyaberi, V. Pai, Improving VoD Server Efficiency with BitTorrent, ACM Multimedia, Augsburg, Germany, (September, 2007).
• Y. Choe, V. Pai, Achieving Reliable Parallel Performance in a VoD Storage Server Using Randomization and Replication, IEEE International Parallel & Distributed Processing Symposium (IPDPS), Long Beach, CA, (March, 2007).
• D. Schuff, V. Pai, Design Alternatives for a High-Performace Self-Securing Ethernet Network Interface, IEEE International Parallel & Distributed Processing Symposium (IPDPS), Long Beach, CA, (March, 2007). Extended results available as Purdue ECE Technical Report 07-02.
• G. Upadhyaya, S. Midkiff, V. Pai, Expressing and Exploiting Concurrency in Networked Applications with Aspen, ACM SIGPLAN Symposium on Principles and Practices of Parallel Programming (PPoPP), San Jose, CA, (March, 2007).
• P. Willmann, H. Kim, S. Rixner, V. Pai, An Efficient Programmable 10 Gigabit Ethernet Network Interface Card, International Symposium on High Performance Computer Architecture (HPCA), San Francisco, CA, (February, 2005).
• S. Majumder, S. Rixner, V. Pai, An Event-Driven Architecture for MPI Libraries, Los Alamos Computer Science Institute (LACSI) Symposium, Santa Fe, NM, (October, 2004).
• P. Willmann, M. Brogioli, V. Pai, Spinach: a Liberty-Based Simulator for Programmable Network Interface Architectures, ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Washington, DC, (June, 2004).
• H. Kim, V. Pai, S. Rixner, Exploiting Task-Level Concurrency in a Programmable Network Interface, ACM SIGPLAN Symposium on Principles and Practices of Parallel Programming (PPoPP), pp. 61-72, San Diego, CA, (June, 2003).
• V. Pai, A. Cox, V. Pai, W. Zwaenepoel, A Flexible and Efficient Application Programming Interface (API) for a Customizable Proxy Cache, USENIX Symposium on Internet Technologies and Systems (USITS), Seattle, WA, (March, 2003).
• H. Kim, V. Pai, S. Rixner, Increasing Web Server Throughput with Network Interface Data Caching, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pp. 239-250, San Jose, CA, (October, 2002).
• V. Pai, S. Adve, Comparing and Combining Read Miss Clustering and Software Prefetching, International Symposium on Parallel Architectures and Compilation Techniques (PACT), pp. 292-303, Barcelona, Spain, (September, 2001).
• V. Pai, S. Adve, Code Transformations to Improve Memory Parallelism, IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 147-155, Haifa, Israel, (November, 1999).
• M. Durbhakula, V. Pai, S. Adve, Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors, International Symposium on High Performance Computer Architecture (HPCA), pp. 23-32, Orlando, FL, (January, 1999).
• D. Sorin, V. Pai, S. Adve, M. Vernon, D. Wood, Analytic Evaluation of Shared-Memory Systems with ILP Processors, International Symposium on Computer Architecture (ISCA), pp. 380-391, Barcelona, Spain, (June, 1998).
• P. Ranganathan, V. Pai, H. Abdel-Shafi, S. Adve, The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems, International Symposium on Computer Architecture (ISCA), pp. 144-156, Denver, CO, (June, 1997).
• P. Ranganathan, V. Pai, S. Adve, Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Models, ACM Symposium on Parallel Algorithms and Architectures (SPAA), pp. 199-210, Newport, RI, (June, 1997).
• V. Pai, P. Ranganathan, S. Adve, The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology, International Symposium on High Performance Computer Architecture (HPCA), pp. 72-83, San Antonio, TX, (February, 1997).
• V. Pai, P. Ranganathan, S. Adve, T. Harton, An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pp. 12-23, Cambridge, MA, (October, 1996).

Other Publications

• A. Pan, J. Walters, V. Pai, D. Kang, S. Crago, Integrating High Performance File Systems in a Cloud Computing Environment, International Workshop on Data-Intensive Scalable Computing Systems (DISCS), Salt Lake City, UT, November, 2012).
• P. Clough, M. Harger, V. Pai, C. Fulton, and T. Snow, A Low-Cost Digital Array Radar Architecture, Government Microcircuit Applications and Critical Technology Conference (GOMACTech), Las Vegas, NV (March, 2012).
• M. Kulkarni, V. Pai, and D. Schuff, Towards Architecture Independent Metrics for Multicore Performance Analysis, Workshop on Hot Topics in Measurement & Modeling of Computer Systems (HotMetrics), New York, NY, (June, 2010).
• D. Schuff, B. Parsons, V. Pai, Multicore-Aware Reuse Distance Analysis, IPDPS Workshop on Performance Modeling, Evaluation, and Optimization of Ubiquitous Computing and Networked Systems, (April, 2010). Extended version available as Purdue ECE Technical Report 09-08.
• V. Pai, Y. Choe, J. Dyaberi, D. Schuff, K. Kannan. Peer-to-peer Video on Demand: Challenges and Solutions, _Workshop on Emerging Technologies on Multimedia Communications and Networking _, New York, NY, (June, 2009).
• C. Fulton, P. Clough, V. Pai, W. Chappell, A Digital Array Radar with a Hierarchical System Architecture, IEEE MTT-S International Microwave Symposium Digest, Boston, MA, (June, 2009)
• S. Ziemba, G. Upadhyaya, V. Pai, Analyzing the Effectiveness of Multicore Scheduling Using Performance Counters, Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA), Beijing, China, (June, 2008)
• Y. Choe, C. Douglas, V. Pai, A Model and Prototype of a Resource-Efficient Storage Server for High-Bitrate Video-on-Demand, _IPDPS Workshop on Performance Modeling, Evaluation, and Optimization of Parallel and Distributed Systems _, (March, 2007)
• D. Schuff, Y. Choe, and V. Pai, Conservative vs. Optimistic Parallelization of Stateful Network Intrusion Detection, ACM SIGPLAN Symposium on Principles and Practices of Parallel Programming (PPoPP) (short paper), San Jose, CA, (March, 2007). Extended version available as Purdue ECE Technical Report 07-01.
• C. Douglas, V. Pai, Seekable Sockets: A Mechanism to Reduce Copy Overheads in TCP-based Messaging, IPDPS Workshop on Communication Architecture for Clusters, (April, 2006)
• D. Schuff, V. Pai, MultiSnort: Fine-Grained Parallel Intrusion Detection, Recent Advances in Intrusion Detection, poster session, (September, 2005).
• V. Pai, S. Rixner, H. Kim, Isolating the Performance Impacts of Network Interface Cards through Microbenchmarks, ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), New York, NY, (July, 2004). Extended version available as Rice ECE Technical Report EE0401
• D. August, S. Malik, L. Peh, V. Pai, Achieving Structural and Composable Modeling of Complex Systems, IPDPS Workshop on NSF Next Generation Software Program, (April, 2004).
• V. Pai, Performance Evolution, Computer Performance Evaluation Workshop, Austin, TX, (December, 2001).
• V. Pai, Exploiting Instruction-Level Parallelism for Memory System Performance, Ph.D. Thesis, Houston, TX, (August, 2000).
• D. Sorin, M. Vernon, V. Pai, S. Adve, D. Wood, A Customized MVA Model for ILP Multiprocessors, University of Wisconsin-Madison Computer Sciences Technical Report, No. 1369, (April, 1998).
• V. Pai, P. Ranganathan, S. Adve, RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors, IEEE Technical Committee on Computer Architecture Newsletter, (October, 1997).
• V. Pai, P. Ranganathan, S. Adve, RSIM Reference Manual: Version 1.0, Rice University ECE Technical Report, No. 9705, (August, 1997).
• V. Pai, The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology, Masters Thesis, (April, 1997).